Boston, MA 06/06/2014 (wallstreetpr) – Micron Technology, Inc. (NASDAQ:MU) on June 5, 2014 announced about the plans of the company to participate in 2014 Symposia on VLSI Technology and Circuits, an event scheduled for June 9-13, 2014. During its participation in the event, the company, apart from a few executive panel appearances, will also feature the presentations depicting advanced memory systems as well as emerging memory systems. The presentations will also focus on incorporation of silicon photonics in bulk as well as copper resistive random access memory (ReRAM).
Details of the silicon photonics in bulk integration presentation
The presentation will include the research conducted by Micron Technology, Inc. (NASDAQ:MU) on developing the first monolithic process flow which integrates silicon photonics on bulk CMOS.
The research will demonstrate the course of action taken for achieving high-performance memory applications. The research taken up by Micron Technology, Inc. (NASDAQ:MU) is the part of much larger project which focuses on building the all-inclusive photonic processor-memory system. The research teams from University of California, Berkeley; Massachusetts Institute of Technology (MIT) and University of Colorado Boulder are included in this project.
Apart from this, the presentation will also put on the podium the copper ReRAM cell for the storage class memory. The ReRAM cell focuses on hybrid memory systems which include DRAM data backup or non-volatile cache form of storage class memory. In the presentation, people will be introduced to ReRAM cell technology and its interaction with storage class memory performance specifications. This will primarily focus on demonstrating the most high-tech ReRAM capability of the world. The technology of this sort is being developed by MU with the help of collaboration partner Sony Corporation.
Role of Micron executives in the Event
Apart from the presentation, MU executives will deliver a speech at three different VLSI discussions. These executives will include Vice President of Research and Development, Scott DeBoer; Vice President and Chief Memory Systems Architect, Ed Doller and Director of Architecture, Mark Bauer.
